Silicon on sapphire (SOS) is a heteroepitaxial process used in integrated circuit manufacturing in which a thin layer of silicon is grown on a sapphire (Al₂O₃) wafer. SOS is part of the silicon-on-insulator (SOI) family of CMOS technologies and is commonly used in applications requiring radiation resistance.

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SOS (Silicon on Sapphire) Wafer (DSP – Double-Side Polished)

Silicon EPI Layer

• Silicon Orientation: (100)
• Type / Dopant: Intrinsic, undoped
• Silicon Thickness: 0.5 µm ±10%
• Resistivity: >100 Ω·cm
• Micro-Particle Density: <2/cm² for particles >2 µm

Sapphire Wafer

• Orientation: R-plane (1-102) with single flat
• Purity: 99.996%
• Wafer Size: 100 mm diameter × 0.46 mm thickness
• Flat: One flat, 32.5 ±2.5 mm, at 45 ±1° CCW from <C> on <R>
• Front Surface: EPI polished, Ra ≤0.3 nm
• Back Surface: Fine ground
• TTV: <15 µm
• Bow: <20 µm
• Warp: <20 µm
• Flatness (TIR): <12 µm
• Laser Mark: On wafer backside, just below the flat
  

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